111111111111111111111111111111111111111111111111111111111111111111111111111111111111111221111111111111111558192392451191315314151879977334358214276881621613387213333122222111114444414145333333333311111211121111144444111111111133333811108144466517171717174444418201818145553333333232229136963133211111111113333333333111111111111111111111111111111122223334137413465335514441341131341313311111213111623111111111111111111111732335557555555212213424423233232431111112115111211121121111111111111112345123451234512345123451234512345injected fault is not included in a suspicious candidate fault set.In the proposed method, the numbers of predictions are 100. In the method using stuck-at fault simulation, the numbers of predictions, non-predictions, and mispredictions are 6 to 34, 61 to 93, and 0 to 5, respectively. Therefore, it was found that the proposed method could accurately deduce the fault location, but the method using the stuck-at fault simulation could accurately deduce the fault location by only 6 to 34％.Our proposed method accelerated diagnosis time by 1.1 to 10.3 times compared with the fault diagnosis method using stuck-at fault simulation for all circuits except for s35932. The cause is because diagnostic fault simulation was performed with only fail test sequences in our proposed method. On the other hand, diagnostic fault simulation was performed with all test sequences in the conventional fault diagnosis method.had smaller numbers of suspicious candidate faults than the proposed method. However, this was because the ratio of deducing correct fault location was very low at 6-34％ as shown in 4-2.4.2 Evaluation of Diagnosis PerformanceTable 4 shows the evaluation of the diagnosis performance and the time for diagnosis. In Table 4, “Circuits” denotes the name of circuits, “k” denotes the number of capture cycles at testing, “Diagnosis performance” denotes the results of diagnosis performance, “Diagnosis time” denotes time (second) for erroneous path tracing and diagnostic fault simulation, “Bridging faults” denotes the experimental results of fault diagnosis methods for faulty circuits with bridging faults, “Open faults” denotes the experimental results of fault diagnosis methods for faulty circuits with open faults, “Proposed” shows the experimental results of our proposed fault diagnosis method, and “SAF” shows the experimental results of the fault diagnosis using stuck-at fault simulation. “Pre”, “Non”, and “Mis” denote the numbers of predictions17), non-predictions17), and mispredictions17), respectively. Prediction is that an injected fault is included in a suspicious candidate fault set, non-prediction is that a suspicious candidate fault set is empty, and misprediction is that an 4.3 Diagnosis Time─ 15 ─Table 3 Experimental Results for the Number of Suspicious Candidate FaultsCircuitskProposedAveMaxMinModeAveMaxMinModeAveMaxMinModeAveMaxMinModeAveMaxMinModeAveMaxMinMode111111228211111111111111111111111117.17.711.925.613.613.032.941.012.922.812.06.45.112.314.213.312.514.811.912.87.67.94.65.28.619.921.215.923.929.75.56.78.36.97.9394112694720143145278469756134343652222272427213317919286394338378655366613211387S5378S9234S13207S35932S38584b14b15Suspicious candidate faultsBridging faultsSAF4.52.44.47.15.27.69.215.26.94.86.117.27.04.611.05.25.44.24.15.37.13.24.66.05.92.42.82.13.33.82.63.43.24.14.5104118513245451249174017741131313131327620202086561267221922Open faultsProposed6.910.410.813.513.79.511.511.712.811.78.817.216.719.424.713.016.815.816.018.410.812.216.913.117.53.64.110.34.24.43.44.93.34.64.7437554901052467524735599613410116725737483257651011641454221627694162727711176773.64.24.03.44.02.82.62.92.92.83.64.75.75.66.54.04.04.04.04.04.26.06.85.26.22.62.42.42.32.23.03.03.03.03.0Suspicious candidate FFRsBridging faultsSAF2.52.63.75.93.83.16.97.72.03.32.91.61.53.33.44.95.15.85.44.31.41.81.61.81.84.86.24.65.18.11.81.82.21.82.1Open faults2.44.24.45.45.03.64.44.64.64.22.43.63.84.25.45.16.05.65.76.22.22.93.52.83.71.21.42.81.61.51.11.71.31.41.7152625303510202010121520242136922222562132235277845161555194821
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